Priority is claimed to Patent Application Numbers 2001-680, filed in the Republic of Korea on Jan. 5, 2001 and 2001-83353 filed Dec. 22, 2001, herein incorporated by reference.
1. Field of the Invention
The present invention relates to a method of manufacturing a field emitter array using low voltage field emission material, carbon nanotubes.
2. Description of the Related Art
Conventionally, Spindt type field emitter arrays (FEAs) formed of a metal such as Mo or a semiconductor material such as Si are used for field emission displays (FEDs). These are micro tip FEDs employing a method of emitting electrons from tips by applying a strong electric field from a gate to the tips arranged at regular intervals. Micro tip FEDs require expensive semiconductor equipment and are disadvantageous in manufacturing FEDs having a large area.
In the case of a tip formed of a metal or semiconductor, a work function is large, so gate voltage for electron emission is relatively very high. Accordingly, during emission of electrons, residual gas particles in a vacuum collide with electrons to be ionized, and these gas ions collide with micro tips shocking them, thereby breaking an electron emission source. In addition, electrons collide with a phosphor layer knocking out phosphor particles which then contaminate micro tips, which decreases the performance of an electron emission source and finally decreases the performance and life of an FEA.
Recently, as carbon nanotubes are introduced as a new field emission material, research into replacing metal tips used as electron emission tips with carbon nanotubes has been conducted. Carbon nanotubes have a large aspect ratio, excellent electrical conductivity, and stable mechanical characteristics. Due to these characteristics, many research organizations are trying to develop ways to manufacture better field emission devices using carbon nanotubes as a field emission material. Such carbon nanotubes require a very low electron emission field of only about 2 V/xcexcm and have excellent chemical stability, so they are suitable for manufacturing field emission displays.
Diode field emission devices using carbon nanotubes can be easily manufactured in a conventional typical structure. However, they are disadvantageous in controlling emission current and realizing a moving picture or gray-scale picture. Accordingly, instead of a diode structure, a triode structure is required. In patents relating to field emission displays using carbon nanotubes, like U.S. Pat. No. 5,973,444 issued to Xu et al., a triode structure and micro tip is formed by a thin film process throughout manufacturing, based on growing carbon nanotubes using a chemical vapor deposition (CVD) method. When a triode structure is manufactured in this way, expensive semiconductor equipment is required, and it is difficult to manufacture displays having a large area.
When an existing thick film process is used, it is difficult to form a typical triode structure due to a limitation of the thick film process in resolution. Moreover, when manufacturing large-area displays, a high temperature annealing process attendant upon the characteristics of a thick film makes it difficult to align layers during formation of a multi-layer.
To solve the above-described problems, it is an object of the present invention to provide a method of manufacturing a carbon nanotube field emitter array, in which blanket deposition of a photosensitive thick film material using screen printing and an etching process are used for forming a triode structure, but a small number of mask layers are used, and through which an alignment problem among layers in a multi-layer is overcome.
To achieve the above object of the invention, in one aspect, there is provided a method of manufacturing a triode carbon nanotube field emitter array. The method includes the steps of (a) forming a conductive thin film layer on the top of a transparent substrate having a transparent electrode and exposing a predetermined portion of the transparent electrode; (b) forming an opaque thin film layer on the exposed predetermined portion of the transparent electrode; (c) depositing an insulation material on the entire top surface of the transparent substrate and removing the insulation material from the top surfaces of the conductive thin film layer and the opaque thin film layer, thereby forming an insulation layer; (d) forming a gate layer on the top of the insulation-layer; and (e) removing the opaque thin film layer and forming carbon nanotube tips on the top of the exposed transparent electrode.
Preferably, the step (a) includes the sub steps of patterning a transparent electrode layer on the transparent substrate, thereby forming the transparent electrode in a striped pattern; forming the conductive thin film layer on the top of the patterned transparent electrode; and forming a hole at a predetermined portion of the conductive thin film layer, thereby exposing the transparent electrode. Alternatively, the step (a) includes the sub steps of forming the conductive thin film layer on the top of the transparent substrate having a transparent electrode layer; patterning the conductive thin film layer and the transparent electrode layer simultaneously in a striped pattern; and forming a hole at a predetermined portion of the conductive thin film layer, thereby exposing the transparent electrode layer.
Preferably, the step (c) is accomplished by performing reverse exposure processing on the transparent substrate after depositing the insulation material on the entire top surface of the transparent substrate.
Preferably, the step (c) forms the insulation layer by performing a cycle two times. The cycle includes the steps of depositing the insulation material on the entire top surface of the transparent substrate using a printing process and drying the resulting structure; removing the insulation material from the top of the conductive thin film layer and the top of the opaque thin film layer using reverse exposure and development processes; and firing the remaining insulation material.
Preferably, the step (d) includes the sub steps of forming an opaque insulation layer on the center portion of the insulation layer using a cathode gate patterned screen mask; depositing conductive photosensitive paste on the entire top surface of the transparent substrate; and performing a reverse exposure process on the transparent substrate, thereby forming the gate layer.
Preferably, the step (e) includes the sub steps of depositing negative photosensitive carbon nanotube paste on the entire top surface of the transparent substrate; and performing a reverse exposure on the transparent substrate, thereby forming the carbon nanotube tips only on the top of the transparent electrode.
Preferably, the conductive thin film layer includes Cr, and the opaque thin film layer includes Al. Preferably, the insulation layer and the gate layer are formed of negative photosensitive paste.
To achieve the above object of the invention, in another aspect, there is provided a method of manufacturing a triode carbon nanotube field emitter array. The method includes the steps of (a) forming a conductive thin film layer on the top of a transparent substrate having a transparent electrode and exposing a predetermined portion of the transparent electrode; (b) depositing an insulation material on the top of the transparent substrate; (c) forming and patterning a gate layer on the top of the insulation material, thereby exposing the insulation material on the top of the transparent electrode; (d) removing the insulation material from the top of the transparent electrode, thereby forming an insulation layer and exposing the conductive thin film layer and a predetermined portion of the transparent electrode; and (e) forming carbon nanotube tips on the top of the exposed transparent electrode.
Preferably, the step (c) includes the sub steps of depositing a conductive material on the top of the insulation material using thin film equipment; and patterning the conductive material at a location corresponding to the transparent electrode in a hole pattern, thereby exposing the insulation material and forming the gate layer.
Preferably, the step (d) is accomplished by performing a dry etching process on the top of the transparent substrate.
Preferably, the step (e) includes the sub steps of depositing negative photosensitive carbon nanotube paste on the entire top surface of the transparent substrate; and performing a reverse exposure on the transparent substrate, thereby forming the carbon nanotube tips only on the top of the transparent electrode.
Preferably, the method further includes the step of performing a PR process on the conductive material of the gate layer, thereby forming a line-shaped gate layer.
Preferably, the conductive thin film layer includes Cr, and the insulation material includes polyimide. Preferably, the insulation layer and the gate layer are formed of positive photosensitive paste.
To achieve the above object of the invention, in still another aspect, there is provided a method of manufacturing a triode carbon nanotube field emitter array. The method includes the steps of (a) sequentially forming an amorphous silicon layer and an insulation layer on a transparent substrate on which a transparent electrode is formed; (b) forming a conductive gate layer on the surface of the insulation layer and forming a hole in the gate layer and the insulation layer such that the amorphous silicon layer is exposed; (c) forming a hole in the exposed amorphous silicon layer, thereby exposing the transparent electrode, and depositing carbon nanotube paste on the entire surface of the transparent substrate having the gate layer and the hole; and (d) performing a development process by radiating ultraviolet rays at a back of the transparent substrate.
Preferably, the step (b) includes forming a hole in the gate layer using photolithography, thereby exposing the insulation layer; and putting the resultant structure in an oxide etchant, thereby forming a hole in the oxide layer such that the amorphous silicon layer is exposed.
Preferably, the step (c) includes performing dry-etching or wet-etching on the amorphous silicon layer, thereby forming a hole exposing the transparent electrode; line-patterning the gate layer using photolithography; and depositing carbon nanotube paste on the entire surface of the transparent substrate having the gate layer and the hole using screen printing.